The present invention relates to a converter control circuit for stopping a motor as promptly as possible in the event of a power failure.
A conventional power failure stop circuit for a converter is shown in FIG. 1, wherein a converter 20 includes a power rectifier unit 1 for converting three phase AC voltage into a pulsating unidirectional voltage, a smoothing condenser 2 for obtaining a DC voltage from the pulsating voltage, and a power inverter unit 3 for inverting the DC voltage into an AC signal of variable voltage and variable frequency. An induction motor 4 is driven and speed-controlled by the power inverter unit 3. A voltage detection circuit 5 detects the DC bus voltage of the power inverter unit 3 and outputs a proportional, reduced voltage signal to a comparator 7 described hereinafter. Reference numeral 6 indicates a rheostat or the like for setting a reference voltage level to judge whether or not a power failure has occurred.
The comparator 7 compares the DC bus voltage signal from the voltage detection circuit 5 with the reference voltage signal from the rheostat 6, and outputs a power failure signal a when the DC bus voltage signal becomes lower than the reference voltage signal.
A holding circuit or latch 8 retains the status of the power failure signal a after it is inputted, and outputs a power failure signal b. An operation mode decision circuit 9 determines the operation mode such as acceleration, normal, and deceleration by comparing the target speed command f.sub.i (desired) with the output frequency command f.sub.o (actual-input not shown). An output frequency command decision circuit 10 sets the frequency command to be outputted on the basis of the mode established by the circuit 9. A PWM signal generation circuit 11 generates a Pulse Width Modulation signal from the output frequency command f.sub.o and outputs it to a PWM signal cut-off circuit 12, which blocks the PWM signal from the circuit 11 only when a power failure signal b is present. A driving circuit 13 for the power inverter unit 3 switches the transistors or thyristors therein ON/OFF in accordance with the PWM signal. A mechanical brake unit 14 applies braking power to the motor 4 only when the power failure signal b from the holding circuit 8 is present.
Under normal operation conditions, the decision circuit 9 commands the acceleration mode when f.sub.o &lt;f.sub.i, the normal mode when f.sub.o =f.sub.i, and the deceleration mode when f.sub.o &gt;f.sub.i. The circuit 10 calculates the frequency command f.sub.o corresponding to the commanded mode pattern and on the basis thereof the PWM signal generation circuit 11 calculates the PWM signal and outputs it to the cut-off circuit 12. Absent a power failure signal b the driving circuit 13 switches the power inverter unit elements according to the PWM signal.
If the input power source fails, however, the comparator 7 outputs the power failure signal a and the holding circuit 8 outputs a latched power failure signal b. The cut-off circuit 12 then blocks the PWM signal from the circuit 11, which attendantly cuts off the output of the driving circuit 13. The motor 4 thus becomes free-running, and it would take a considerable time to stop when its inertial load force (GD.sup.2) is large. If the motor 4 is controlling a working machine stroke, for example, a dangerous condition could result. The motor is thus equipped with a mechanical brake unit 14, which effectively and abruptly stops it when the power failure signal b is generated.